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Mosfet:types ,n & p channel mosfet switch

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What is Mosfet?

The Mosfet (metal oxide semiconductor field-effect transistor) is another category of field-effect transistor. The MOSFET, different from the JFET, has no pn junction structure ; instead, the gate of the MOSFET is insulated from the channel by a silicon dioxide (SiO2) layer. The two basic types of MOSFETs are enhancement (E) and depletion
(D). Of the two types, the enhancement MOSFET is more widely used. Because polycrystalline silicon is now used for the gate material instead of metal, these devices are sometimes called IGFETs (insulated-gate FETs).

Enhancement MOSFET (E-MOSFET):

The E-MOSFET operates only in the enhancement mode and has no depletion mode. It differs in construction from the D-MOSFET, which is discussed next, in that it has no structural channel. The substrate extends completely to the SiO2 layer. For an n-channel device, a positive gate voltage above a threshold value induces a channel by creating a thin layer of negative charges in the substrate region adjacent to the SiO2 layer. The conductivity of the channel is enhanced by increasing the gate-to-source voltage and thus pulling more electrons into the channel area. For any gate voltage below the threshold value, there is no channel.

Representation of the basic E-MOSFET construction and operation (n-channel)are shown in Fig:

The mosfet

The schematic symbols for the n-channel and p-channel E-MOSFETs . The broken lines symbolize the absence of a physical channel. An inward-pointing substrate arrow is for n channel, and an outward-pointing arrow is for p channel. Some E-MOSFET devices have a separate substrate connection.
E-MOSFET schematic symbols are shown in above Fig:

e-mosfet schematic symbol

Depletion MOSFET (D-MOSFET):

Another type of MOSFET is the depletion MOSFET (D-MOSFET),and illustrates its basic structure. The drain and source are diffused into the substrate material and then connected by a narrow channel adjacent to the insulated gate. Both n-channel and p-channel devices are shown in the figure.We will use the n-channel device to describe the basic operation. The p-channel operation is the same, except the voltage polarities are opposite those of the n-channel.

Representation of the basic structure of D-MOSFETs are shown in above Fig:

d-mosfet

The D-MOSFET can be operated in either of two modes—the depletion mode or the enhancement mode—and is sometimes called a depletion/enhancement MOSFET. Since the gate is insulated from the channel, either a positive or a negative gate voltage can be applied. The n-channel MOSFET operates in the depletion mode when a negative gate-to-source voltage is applied and in the enhancement mode when a positive gate-to-source voltage is applied. These devices are generally operated in the depletion mode.

Depletion Mode:

Visualize the gate as one plate of a parallel-plate capacitor and the channel as the other plate. The silicon dioxide insulating layer is the dielectric. With a negative gate voltage, the negative charges on the gate repel conduction electrons from the channel, leaving positive ions in their place. Thereby, the n channel is depleted of  some of its electrons, thus decreasing the channel conductivity. The greater the negative voltage on the gate, the greater the depletion of n-channel electrons. At a sufficiently  negative gate-to-source voltage, V GS(off ), the channel is totally depleted and the drain current is zero. Like the n-channel JFET, the n-channel D-MOSFET conducts drain current for gate-to-source voltages between V GS(off ) and zero. In addition, the D-MOSFET conducts for values of V GS above zero.

Operation of n-channel D-MOSFET are shown in Fig:

operation of n-channel d-mosfet

Enhancement Mode:

With a positive gate voltage, more conduction electrons are attracted into the channel, thus increasing (enhancing) the channel conductivity.

D-MOSFET Symbols:

The schematic symbols for both the n-channel and the p-channel depletion MOSFETs. The substrate, indicated by the arrow, is normally (but not always) connected internally to the source. Sometimes, there is a separate substrate pin.

D-MOSFET schematic symbols are shown in Fig:

d-mosfet schematic symbol

Power MOSFET Structures:

The conventional enhancement MOSFETs have a long thin lateral channel as shown in the structural. This results in a relatively high drain-to-source resistance and limits the E-MOSFET to low power applications. When the gate is positive, the channel is formed close to the gate between the source and the drain, as shown.

Laterally Diffused MOSFET (LD MOSFET):

The LDMOSFET has a lateral channel structure and is a type of enhancement MOSFET designed for power applications. This device has a shorter channel between drain and source than does the conventional E-MOSFET. The shorter channel results in lower resistance, which allows higher current and voltage.

Cross section of conventional E-MOSFET structure. Channel is shown as white area in above Fig:

cross sectional of mosfetThe basic structure of an LDMOSFET. When the gate is positive, a very short n channel is induced in the p layer between the lightly doped source and the n – region .There is current between the drain and source through the n regions and the induced channel as indicated.Cross section of LDMOSFET lateral channel structure. are shown in Figure:
cross sectional of LD mosfet

V Mosfet:

The V-groove MOSFET is another example of the conventional E-MOSFET designed to achieve higher power capability by creating a shorter and wider channel with less resistance between the drain and source using a vertical channel structure. The shorter, wider channels allow for higher currents and, thus, greater power dissipation. Frequency response is also improved.

The V Mosfet has two source connections, a gate connection on top, and a drain connection on the bottom. The channel is induced vertically along both sides of the V-shaped groove between the drain (n+ substrate where n+ means a higher doping level than n– ) and the source connections. The channel length is set by the thickness of the layers, which is controlled by doping densities and diffusion time rather than by mask dimensions.

Cross section of V Mosfet vertical channel structure are shown in above Figure:
cross sectional v mosfet vertical cheannel structure

T Mosfet:

The vertical channel structure of the T Mosfet is illustrated in Figure. The gate structure is embedded in a silicon dioxide layer, and the source contact is continuous over the entire surface area. The drain is on the bottom. T Mosfet achieves greater packing density than V Mosfet, while retaining the short vertical channel advantage.

Cross section of T Mosfet vertical channel structure are shown in Figure:
Cross section of TMOSFET vertical channel structure

Dual-Gate MOSFETs:

The dual-gate MOSFET can be either a depletion or an enhancement type. The only difference is that it has two gates. As previously mentioned, one drawback of a FET is its high input capacitance, which restricts its use at higher frequencies. By using a dual-gate device, the input capacitance is reduced, thus making the device useful in high-frequency RF amplifier applications. Another advantage of the dual-gate arrangement is that it allows for an automatic gain control (AGC) input in RF amplifiers. Another application is demonstrated in the Application Activity where the bias on the second gate is used to adjust the transconductance curve.

Dual-gate n-channel mosfet symbols are shown in Figure:

Dual-gate n-channel MOSFET symbols

Mosfet Characteristics And Parameters:

Much of the discussion concerning JFET characteristics and parameters applies equally to MOSFETs. In this section, MOSFET parameters are discussed.

E-Mosfet Transfer Characteristic:

The E-Mosfet uses only channel enhancement. Therefore, an n-channel device requires  a positive gate-to-source voltage, and a p-channel device requires a negative gate-to-source voltage. The general transfer characteristic curves for both types of E-MOSFETs. As you can see, there is no drain current when V GS = 0. Therefore, the E-Mosfet does not have a significant IDSS parameter, as do the JFET and the D-Mosfet. Notice also that there is ideally no drain current until V GS reaches a certain nonzero value called the threshold voltage, V GS(th). E-MOSFET general transfer characteristic curves are shown in above Figure:

E-MOSFET general transfer characteristic curves.

The equation for the parabolic transfer characteristic curve of the E-MOSFET differs from that of the JFET and the D-MOSFET because the curve starts at V GS(th) rather than  V GS(off ) on the horizontal axis and never intersects the vertical axis. The equation for the E-MOSFET transfer characteristic curve is:

= K (V GS  – V GS(th)

The constant K depends on the particular MOSFET and can be determined from the datasheet by taking the specified value of ID, called ID(on), at the given value of V GS and substituting the values into Equation as illustrated in Example:

Example:

The datasheet for a 2N7002 E-MOSFET gives ID(on) =  500 mA (minimum) at V GS  = 10 V and V GS(th) = 1 V. Determine the drain current for V GS = 5 V.

D-Mosfet Transfer Characteristic:

As previously discussed, the D-mosfet on operate with either positive or negative gate voltage. This is indicated on the general transfer characteristic curves for both n-channel and -channel Mosfets. The point on the curves where V GS  = 0 corresponds to DSS . The point where I  = o corresponds to V VG(off) = -Vp.

The square law expression in equation for the JFET curve also applies to the D-Mosfet curve.D-Mosfet general transfer characteristic curves are shown in Figure:

d-mosfet general transfer characteristic curves

Handling Precautions:

All MOS devices are subject to damage from electrostatic discharge (ESD). Because the gate of a MOSFET is insulated from the channel, the input resistance is extremely high (ideally infinite). The gate leakage current,IGSS ,for a typical mosfet is in the pA range,whereas the gate reverse current for a typical JFET is in the nA range.The input capacitance results from the insulated gate structure.Excess static charge can be accumulated because the input capacitance combines with the very high input resistance and can result in damage to the device.To avoid damage from ESD,certain precautions should be taken when handling mosfets.

  1. Carefully remove mosfet devices from their packaging.They are shipped in conductive foam or special foil conductive bags.
  2. All instruments and metal benches used in assembly or test should be connected to earth ground(round or third prong of 110V wall outlets).
  3. The assemblers or handlers wrist should be connected to commercial grounding strap,which has a high value series resistor for safety.
  4. Never remove a Mosfet device (or any other device, for that matter) from the circuit while the power is on.
  5. Do not apply signals to a mosfet device while the de power supplies off.

Mosfet Biasing:

Three ways to bias a MOSFET which are:

  • Zero bias
  • voltage divider
  • Drain feed back biasing

Biasing is important in FET amplifiers.

E-MOSFET Bias:

Because E-MOSFETs must have a VGS greater than the threshold value,VGS(th),zero bias cannot be used.e mosfet biasing

Two ways to bias An E-MOSFET (D-MOSFETs can also be biased using these methods).An n channel device is used for purposes of illustration.In either the voltage divider or drain feed back bias arrangement,the purpose is make the gate voltage more positive than the source by an amount exceeding VGS(th).Equations for the analysis of the voltage divider bias are as follows:

e mosfet biasing equation

where ID=K(VGSVGS(th)2

 

D-MOSFET Bias:

Recall that MOSFETs can be operated with either positive or negative values of V GS . A simple bias method is to set V GS = 0 so that an ac signal at the gate varies the gate-to-source voltage above and below this 0 bias point. A mosfet with zero bias is shown in figure. Since V GS = 0, DSS as indicated. The drain-to-source voltage is expressed as follows:

DS = V DD – IDSSRD

The purpose of RG is to accommodate an ac signal input by isolating it from ground, as shown in figure. Since there is no de gate current,R does not affect the zero gate-to-source bias.

a zero biased

Watch video about MOSFET:

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